There is an increasing demand for improved characteristics for CMOS (Complementary Metal Oxide Semiconductor) image sensors, CCD (Charge Coupling Device) image sensors and other image input image sensors used in digital cameras, camera-attached cell phones and other applications.
A very important factor in such CMOS image sensors or other solid-state image pickup devices is whether the signal charge obtained at the photodiode of each pixel can be transferred to the output without any loss. This character determines the image quality. The linearity between the voltage corresponding to the signal charge and the output voltage from the pixel is thus an important factor.
FIG. 11 is a circuit diagram illustrating a source follower circuit used for reading the charge accumulated in each pixel as a voltage. This source follower includes one NMOS transistor M1. The gate electrode of transistor M1 is connected to a floating diffusion region that stores the charge of each pixel. The voltage Vin corresponds to the stored charge. A predetermined voltage VR is applied via a selecting transistor not shown to one end of the source/drain path. The other end of the source/drain path connects to output line Vout. When transistor M1 is saturated, the gate-source voltage Vgs equals threshold voltage Vth{Vout}. The output voltage Vout becomes Vin−Vth{Vout}.
In such a source follower circuit, the source voltage differs from the body voltage. Consequently, Vth is influenced by the bias of the substrate as shown in equation (1).
                              V          th                =                              V            th0                    +                                    γ              ⁡                              (                                                                                                                                                    2                          ⁢                                                                                                          ⁢                                                      Φ                            F                                                                          +                                                  V                          out                                                                                                                            -                                                                                                          2                        ⁢                                                                                                  ⁢                                                  Φ                          F                                                                                                                                          )                                      ⁢                                                  ⁢            where            ⁢                          :                                                          (        1        )                                γ        =                                            2              ⁢                                                          ⁢              q              ⁢                                                          ⁢                              ɛ                Si                            ⁢                              N                sub                                                    C              ox                                                          (        2        )                                                      Φ            F                    =                                    kT              q                        ⁢            ln            ⁢                                                                          N                  sub                                                  n                  i                                                                                  ⁢                                                      (        3        )            q is the elementary charge; ∈Si is the dielectric constant of silicon; Nsub is impurity concentration in the substrate; Cox is the capacitance of the gate oxide film; ni is the true carrier density; k is the Boltzmann constant; and T represents the absolute temperature.
According to these equations Vth is a function of the output voltage and does not have a constant value. This leads to deterioration in the linearity between the voltage of the signal charge and output voltage of the pixel. As a result, the image quality of the solid-state image pickup device depends upon the performance of the source follower.
It is possible to avoid the influence of the substrate bias by setting the source and the body at the same voltage. However, this requires a large area to form a well for element separation. Consequently, it is difficult use this scheme in a CMOS image sensor where the pixel size must be small.
The problem addressed by the present invention is improving the linearity of the source follower in a CMOS image sensor or other solid-state image pickup device to improve the image quality.